Buffers on integrated circuits often drive external loads which are large relative to the internal loads other circuits drive. As technological developments continually bolster the operating frequencies of integrated circuits, the external loads, which usually include circuit board traces and other integrated circuits, are driven faster and faster to comply with tighter timing specifications. Higher slew rates emphasize impedance mismatches since both capacitive and inductive components of transmission line impedance become more pronounced with increased frequency.
Buffers often operate across a wide variety of operating conditions and often comprise transistors with device characteristics which vary according to the circuit fabrication process. As an example, both temperature and voltage are operating conditions which affect a typical CMOS device. A higher device temperature or a lower voltage power supply will reduce device switching speeds (effectively increasing buffer impedance). Fabrication processes are often continuously refined to produce faster devices and obtain better performance. Fabrication of a CMOS device with a shorter channel length or a thinner gate oxide will typically increase switching speeds (effectively decreasing impedance). Device characteristics are also subject to limited deviations in the manufacturing process. Thus, minor processing refinements or manufacturing deviations can also shift the impedance of a buffer from its original design target.
Additionally, an impedance mismatch may be caused by external loads. An integrated circuit is often used in a variety of system configurations each possibly providing a different external load on a particular signal. In each particular system, output signals with distinct purposes generally have distinct signal routing to the appropriate load devices. Consequently, external loads differ from signal to signal and from system to system, further increasing the variation in performance of uncompensated buffers.
An uncompensated buffer may not operate well under extreme conditions. Under the conditions when the buffer's impedance is high, it may not switch fast enough. Under the opposite low impedance conditions, it may also fail because it switches too fast.
Thus the expected deviations in impedance in uncompensated output circuits are a problem. Transmission line effects including ringing and reflection become more pronounced as switching frequencies increase. Further, processing changes and external load variation compound impedance matching problems of an uncompensated output circuit, making it desirable to develop a buffer which is impedance compensated.
As a result a number of compensation schemes have evolved. Generally, the designer still has a target impedance range, but various techniques adjust the buffer's operation before or during operation to help minimize impedance mismatch problems. Prior art techniques have included using any of a number of parallel buffers according to either a user's selection or the results of an impedance test initiated by the chip. Similarly, operating conditions and processing have been compensated by adjusting output driver's effective size according to the current flow through a sampled transistor (U.S. Pat. No. 4,719,369).
Another prior art compensated output buffer scheme as illustrated in FIG. 1 is redrawn from FIG. 2 of U.S. Pat. No. 4,975,598. Bias voltages NCOMP and PCOMP, which are developed by monitoring scaled down versions of the output buffer, bias transistors in a predriver stage of buffers 120a-e. The bias voltages adjust output waveforms of a predriver circuit, thereby compensating a main driver. As indicated by N Type MOS Transistor Compensator block 100 and P Type MOS Transistor Compensator 110, this method requires two scaled down versions of the output buffer to develop the compensation voltages.
In another prior art reference, U.S. Pat. No. 5,063,308 "Output Driver with Static and Transient Parts," a buffer with a driver continuously enabled and a driver enabled during an output transition has been discussed in the context of reducing the switching noise generated during the output transition. This patent discusses using a schmitt trigger circuit to turn off a transient portion of a buffer, resulting in less ground bounce due to the reduced instantaneous switching current.
Thus, the known prior art reveals a number of impedance compensation techniques and also reveals a buffer with static and transient drivers.